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1 for more information www.linear.com/LTM8032 typical a pplica t ion descrip t ion en55022b compliant 36v, 2a dc/dc module regulator the lt m ? 8032 is an electromagnetic compatible (emc) 36v , 2 a dc/dc step-down module ? regulator designed to meet the radiated emissions requirements of en55022. conducted emission requirements can be met by adding standard filter components. included in the package are the switching controller, power switches, inductor, filters and all support components. operating over an input voltage range of 3.6 v to 36 v, the LTM8032 supports an output voltage range of 0.8 v to 10 v, and a switching frequency range of 200 khz to 2.4 mhz, each set by a single resistor. only the bulk input and output filter capacitors are needed to finish the design. the low profile package enables uti - lization of unused space on the bottom of pc boards for high density point of load regulation. the LTM8032 is packaged in a thermally enhanced, com - pact and low profile overmolded land grid array ( lga) and ball grid array ( bga) packages suitable for automated assembly by standard surface mount equipment. the LTM8032 is available with snpb (bga) or rohs compli - ant terminal finish. l, lt , lt c , lt m , linear technology, the linear logo, module and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. ultralow noise 5v/2a dc/dc module regulator fea t ures a pplica t ions n complete step-down switch mode power supply n wide input voltage range: 3.6v to 36v n 2a output current n 0.8 v to 10v output voltage n selectable switching frequency: 200khz to 2.4mhz n en55022 class b compliant n current mode control n programmable soft-start n snpb (bga) or rohs compliant (lga and bga) finish n low profile, surface mount lga (9mm 15mm 2.82mm) and bga (9mm 15mm 3.42mm) packages n automotive batter y regulation n power for portable products n distributed supply regulation n industrial supplies n wall transformer regulation LTM8032 emi performance 90 70 50 emissions level (dbv/m) 30 10 80 60 40 20 0 ?10 0 100 200 300 400 500 frequency (mhz) 600 700 800 900 1000 en55022 class b limit 8031 ta01b rt share 47.5k 44.2k f sw = 700khz *running voltage range. see applications for start-up details v in fin 2.2f 10f v out 5v 2a run/ss v in * 7vdc to 36vdc pgood bias LTM8032 aux v out sync gnd 8032 ta01a adj 8032fg LTM8032
2 for more information www.linear.com/LTM8032 v in , fin , run / ss voltage ......................................... 40 v ad j , rt, share voltage ............................................. 5 v v out , aux ................................................................. 10 v c urrent from aux ................................................ 10 0 ma (note 1) gnd 1 a b c bank 1 bank 2 bank 3 d e f g h j k l 2 3 4 top view lga package 71-lead (9mm 15mm 2.82mm) 5 6 7 v out v in rt share adj pgood sync run/ss fin bias aux t jmax = 125c, ja = 25.2c/w, jcbottom = 10.3c/w, jctop = 15.8c/w, jb = 11.4c/w, weight = 1.2g values determined per jesd51-9 gnd 1 a b c bank 1 bank 2 bank 3 d e f g h j k l 2 3 4 top view bga package 71-lead (9mm 15mm 3.42mm) 5 6 7 v out v in rt share adj pgood sync run/ss fin bias aux t jmax = 125c, ja = 25.6c/w, jcbottom = 11.0c/w, jctop = 15.8c/w, jb = 11.4c/w, weight = 1.2g values determined per jedec 51-9, 51-12 p in c on f igura t ion a bsolu t e maxi m u m r a t ings part number pad or ball finish part marking* package type msl ra ting temperature range (note 2) device code LTM8032ev#pbf au (rohs) LTM8032v e4 lga 3 C40c to 125c LTM8032iv#pbf au (rohs) LTM8032v e4 lga 3 C40c to 125c LTM8032 mpv #pbf au (rohs) LTM8032 mpv e4 lga 3 C55c to 125c LTM8032ey#pbf sac305 (rohs) LTM8032y e1 bga 3 C40c to 125c LTM8032iy#pbf sac305 (rohs) LTM8032y e1 bga 3 C40c to 125c LTM8032 mpy #pbf sac305 (rohs) LTM8032y e1 bga 3 C55c to 125c LTM8032 mpy snpb (63/37) LTM8032y e0 bga 3 C55c to 125c or d er in f or m a t ion pgood , sync ........................................................... 30 v bias .......................................................................... 25 v v in + bias ................................................................. 56 v m aximum junction temperature ( note 2) ............ 12 5 c solder temperature ............................................... 24 5 c consult marketing for parts specified with wider operating temperature ranges. *device temperature grade is indicated by a label on the shipping container. pad or ball finish code is per ipc/jedec j-std-609. ? pb-free and non-pb-free part markings: www.linear.com/leadfree ? recommended lga and bga pcb assembly and manufacturing procedures: www.linear.com/umodule/pcbassembly ? lga and bga package and t ray drawings: www.linear.com/packaging 8032fg LTM8032
3 for more information www.linear.com/LTM8032 e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTM8032e is guaranteed to meet performance specifications from 0c to 125c internal. specifications over the C40c to 125c internal temperature range are assured by design, characterization and the l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at t a = 25c. v in = 10v, v run/ss = 10v, v bias = 3v, unless otherwise specified. symbol parameter conditions min typ max units v in input dc voltage l 3.6 36 v v out output dc voltage 0.2a < i out 2a, r adj open 0.2a < i out 2a, r adj = 21.6k 0.8 10 v v i out continuous output dc current v in = 24v 2 a i q(vin) v in quiescent current v run/ss = 0.2v v bias = 3v, not switching v bias = 0v, not switching l 0.6 25 88 60 120 a a a i q(bias) bias quiescent current v run/ss = 0.2v v bias = 3v, not switching v bias = 0v, not switching l 0.03 60 1 120 5 a a a ?v out v out line regulation 10v v in 36v, i out = 1a, v out = 3.3v 0.1 % load regulation v in = 24v, 0.2a i out 2a, v out = 3.3v 0.3 % v out(ac_rms) output ripple (rms) v in = 24v, i out = 2a, v out = 3.3v 6 mv f sw switching frequency r t = 113k 325 khz v adj voltage at adj pin l 765 790 815 mv v bias(min) minimum bias voltage for proper operation 1.9 2.8 v i adj current out of adj pin v run/ss = 0v, v adj = 0v, v out = 1v 4 a i run/ss run/ss pin current v run/ss = 2.5v 5 10 a v ih(run/ss) run/ss input high voltage 2.5 v v il(run/ss) run/ss input low voltage 0.2 v v pg(th) adj voltage threshold for pgood to switch 730 mv i pgo pgood leakage v pg = 30v 0.1 1 a i pgsink pgood sink current v pg = 0.4v 200 800 a v syncil sync input low threshold f sync = 550khz 0.5 v v syncih sync input high threshold f sync = 550khz 0.7 v i sync(bias) sync pin bias current v sync = 0v, v bias = 0v 0.1 a v in(ripple) 550khz narrowband conducted emission 1mhz narrowband conducted emission 3mhz narrowband conducted emission v in = 24v, v out = 3.3v, i out = 2a, f sw = 550khz, 5h lisn 89 69 51 db v dbv dbv correlation with statistical process controls. LTM8032i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. the LTM8032mp is guaranteed to meet specifications over the full C55c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. 8032fg LTM8032
4 for more information www.linear.com/LTM8032 typical p er f or m ance c harac t eris t ics input current vs output current, 3.3v out input current vs output current, 5v out input current vs output current, 8v out minimum required input voltage vs output voltage, i out = 2a minimum required input voltage vs load current, v out = 2.5v minimum required input voltage vs load current, v out = 3.3v 3.3v out efficiency 5v out efficiency 8v out efficiency t a = 25c, unless otherwise noted. output current (a) 0.01 0 efficiency (%) 20 30 40 50 60 70 0.1 1 8031 g01 80 90 100 10 10 5.5v in 12v in 24v in 36v in output current (a) 0.01 0 efficiency (%) 20 30 40 50 60 70 0.1 1 8031 g02 80 90 100 10 10 12v in 24v in 36v in output current (a) 0.01 0 efficiency (%) 20 30 40 50 60 70 0.1 1 8031 g03 80 90 100 10 10 12v in 24v in 36v in output current (ma) 0 input current (ma) 800 1000 1200 2000 8032 g04 600 400 0 500 1000 1500 200 1600 1400 5.5v in 12v in 24v in 36v in output current (ma) 0 0 input current (ma) 200 400 600 800 1000 1200 500 1000 1500 2000 8032 g05 12v in 24v in 36v in output current (ma) 1 input current (ma) 1000 1200 1400 2000 8032 g06 800 600 0 500 1000 1500 400 200 1800 1600 12v in 24v in 36v in output voltage (v) 0 2 input voltage (v) 4 6 8 10 12 14 2 4 6 8 8032 g07 10 load current (ma) 0 2.0 input voltage (v) 2.5 3.0 3.5 4.0 4.5 5.0 500 1000 1500 2000 8032 g08 to run to start load current (ma) 0 3.0 input voltage (v) 3.5 4.0 4.5 5.0 5.5 6.0 500 1000 1500 2000 8032 g09 to run to start run/ss enabled 8032fg LTM8032
5 for more information www.linear.com/LTM8032 typical p er f or m ance c harac t eris t ics output current vs input voltage (output shorted) input current vs input voltage (output shorted) temperature rise vs load current, v out = 2.5v (lga) temperature rise vs load current, v out = 3.3v (lga) temperature rise vs load current, v out = 5v (lga) temperature rise vs load current, v out = 8v (lga) minimum required input voltage vs load current, v out = 5v minimum required input voltage vs load current, v out = 8v bias current vs output current t a = 25c, unless otherwise noted. load current (ma) 0 input voltage (v) 6.5 7.0 7.5 8032 g10 6.0 5.5 5.0 500 1000 1500 2000 to run to start run/ss enabled load current (ma) 0 8.0 input voltage (v) 8.5 9.0 9.5 10.0 10.5 11.0 500 1000 1500 2000 8032 g11 to run to start run/ss enabled output current (ma) 0 0 bias current (ma) 5 10 15 20 25 30 500 1000 1500 2000 8032 g12 3.3v out 5v out 8v out input voltage (v) 0 output current (ma) 2400 2600 2800 40 8032 g13 2200 2000 1600 10 20 30 1800 3200 3000 input voltage (v) 0 0 input current (ma) 200 400 600 800 1000 1200 10 20 30 40 8032 g14 load current (ma) 0 25 30 35 2000 8032 g15 20 15 500 1000 1500 2500 10 5 0 temperature rise (c) 5v in 12v in 24v in 36v in load current (ma) 0 temperature rise (c) 15 20 25 1500 2500 8032 g16 10 5 0 500 1000 2000 30 35 40 5v in 12v in 24v in 36v in load current (ma) 0 temperature rise (c) 15 20 25 1500 2500 8032 g17 10 5 0 500 1000 2000 30 35 40 12v in 24v in 36v in load current (ma) 0 temperature rise (c) 30 40 50 2000 8032 g18 20 10 25 35 45 15 5 0 500 1000 1500 2500 12v in 24v in 36v in 8032fg LTM8032
6 for more information www.linear.com/LTM8032 typical p er f or m ance c harac t eris t ics temperature rise vs load current, v out = 10v (lga) radiated emissions radiated emissions t a = 25c, unless otherwise noted. temperature rise vs load current, v out = 2.5v (bga) temperature rise vs load current, v out = 5v (bga) temperature rise vs load current, v out = 3.3v (bga) temperature rise vs load current, v out = 10v (bga) load current (ma) 0 temperature rise (c) 30 40 50 2000 8032 g19 20 10 25 35 45 15 5 0 500 1000 1500 2500 24v in 36v in 90 70 50 emissions level (dbv/m) 30 10 ?10 0 v in = 36v v out = 10v at 2a 100 200 300 400 500 frequency (mhz) 600 700 800 900 1000 8031 g20 90 70 50 emissions level (dbv/m) 30 10 ?10 0 v in = 13v v out = 10v at 2a 100 200 300 400 500 frequency (mhz) 600 700 800 900 1000 8031 g21 load current (ma) 0 0 temperature rise (c) 10 15 20 25 500 1500 2000 1000 8032 g22 30 35 5 2500 5v in 12v in 24v in 36v in load current (ma) 0 0 temperature rise (c) 15 20 500 1500 2000 1000 8032 g23 25 30 35 10 5 2500 12v in 24v in 36v in load current (ma) 0 0 temperature rise (c) 15 20 500 1500 2000 1000 8032 g24 25 35 30 40 10 5 2500 12v in 24v in 36v in load current (ma) 0 0 temperature rise (c) 30 500 1500 2000 1000 8032 g25 40 50 60 20 10 2500 24v in 36v in 8032fg LTM8032
7 for more information www.linear.com/LTM8032 p in func t ions v in ( bank 3): the v in pin supplies current to the LTM8032 s internal regulator and to the internal power switch. this pin must be locally bypassed with an external, low esr capacitor of at least 2.2f. fin ( k3, l3): filtered input. this is the node after the input emi filter. use this only if there is a need to modify the behavior of the integrated emi filter or if v in rises or falls rapidly; otherwise, leave these pins unconnected. see the applications information section for more details. gnd (bank 2): tie these gnd pins to a local ground plane below the LTM8032 and the circuit components. in most applications, the bulk of the heat flow out of the LTM8032 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. see the pcb layout and thermal considerations sections for more details. return the feedback divider ( r adj ) to this net. v out (bank 1): power output pins. apply the output filter capacitor and the output load between these pins and gnd pins. aux ( pin h5): low current voltage source for bias. the aux pin is internally connected to v out and is placed adjacent to the bias pin to ease printed circuit board routing. although this pin is internally connected to v out , do not connect this pin to the load. if this pin is not tied to bias, leave it floating. bias ( pin h 4): the bias pin connects to the internal power bus. connect to a power source greater than 2.8 v. if the output is greater than 2.8 v, connect this pin to aux. if the output voltage is less, connect this to a voltage source between 2.8 v and 25 v. also, make sure that bias + v in is less than 56v. run/ss ( pin l5): pull run/ss pin to less than 0.2 v to shut down the LTM8032. tie to 2.5 v or more for normal operation. if the shutdown feature is not used, tie this pin to the v in pin. run/ss also provides a soft-start function; see the applications information section. rt ( pin g7): the rt pin is used to program the switching frequency of the LTM8032 by connecting a resistor from this pin to ground. the applications information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. minimize capacitance at this pin. share ( pin h7): tie this to the share pin of another LTM8032 when paralleling the outputs. otherwise, do not connect (leave floating). sync ( pin l6): this is the external clock synchronization input. ground this pin for low ripple burst mode ? operation at low output loads. tie to a stable voltage source greater than 0.7 v to disable burst mode operation. do not leave this pin floating. tie to a clock source for synchronization. clock edges should have rise and fall times faster than 1s. see synchronization section in applications information. pgood ( pin k7): the pgood pin is the open-collector output of an internal comparator. pgood remains low until the adj pin is within 10% of the final regulation voltage. the pgood output is valid when v in is above 3.6 v and run/ss is high. if this function is not used, leave this pin floating. adj ( pin j7): the LTM8032 regulates its adj pin to 0.79v. connect the adjust resistor from this pin to ground. the value of r adj is given by the equation: r adj = 196.71 v out C 0.79 where r adj is in k. 8032fg LTM8032
8 for more information www.linear.com/LTM8032 b lock diagra m current mode controller 249k 10f v out aux gnd 4.7h bias emi filter fin v in gnd share sync rt pgood adj 8032 bd run/ss 8032fg LTM8032
9 for more information www.linear.com/LTM8032 o pera t ion a pplica t ions i n f or m a t ion the LTM8032 is a standalone nonisolated step-down switching dc/dc power supply. it can deliver up to 2 a of dc output current with only bulk external input and output capacitors. this module provides a precisely regulated output voltage programmable via one external resistor from 0.8 vdc to 10 vdc. the input voltage range is 3.6v to 36 v. given that the LTM8032 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. a simplified block diagram is given on the previous page. the LTM8032 is designed with an input emi filter and other features to make its radiated emissions compliant with several emc specifications including en55022 class b. compliance with conducted emissions requirements may be obtained by adding a standard input filter. the LTM8032 contains a current mode controller, power switching element, power inductor, power schottky diode and a modest amount of input and output capacitance. the LTM8032 is a fixed frequency pwm regulator. the switching frequency is set by simply connecting the ap - propriate resistor value from the rt pin to gnd. an internal regulator provides power to the control circuitry . the bias regulator can draw power from the v in pin, but if the bias pin is connected to an external voltage higher than 2.8v, bias power will be drawn from the external source (typically the regulated output voltage). this improves efficiency. the run/ss pin is used to place the LTM8032 in shutdown, disconnecting the output and reducing the input current to less than 1a. to further optimize efficiency, the LTM8032 automatically switches to burst mode operation in light load situations. between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to 50 a in a typical application. the oscillator reduces the LTM8032s operating frequency when the voltage at the adj pin is low. this frequency foldback helps to control the output current during start-up and overload. the LTM8032 contains a power good comparator which trips when the adj pin is at 90% of its regulated value. the pgood output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the pgood pin high. power good is valid when the LTM8032 is enabled and v in is above 3.6v. for most applications, the design process is straight for ward, summarized as follows: 1. look at table 1 and find the row that has the desired input range and output voltage. 2. apply the recommended c in , c out , r adj and r t values. 3. connect bias as indicated. as the integrated input emi filter may ring in response to an application of a step input voltage, a bulk capacitance, series resistance or some clamping mechanism may be required. see the hot-plugging safely section for details. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. capacitor selection considerations the c in and c out capacitor values in table 1 are the minimum recommended values for the associated oper- ating conditions . applying capacitor values below those indicated in table 1 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. again, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and ap- plied voltage and give dependable service. other types, including y5v and z5u have very large temperature and voltage coefficients of capacitance. in an application 8032fg LTM8032
10 for more information www.linear.com/LTM8032 a pplica t ions i n f or m a t ion table 1. recommended component values and configuration v in v out c in c out r adj bias f optimal r t(optimal) f max r t(min) 3.6v to 36v 0.82v 2.2f 200f 1206 5.62m 2.8v, <25v 250k 150k 250k 150k 3.6v to 36v 1.00v 2.2f 200f 1206 953k 2.8v, <25v 300k 124k 300k 124k 3.6v to 36v 1.20v 2.2f 147f 1206 487k 2.8v, <25v 350k 105k 350k 105k 3.6v to 36v 1.50v 2.2f 147f 1206 280k 2.8v, <25v 400k 88.7k 400k 88.7k 3.6v to 36v 1.80v 2.2f 100f 1206 196k 2.8v, <25v 450k 78.7k 450k 78.7k 3.6v to 36v 2.00v 2.2f 68f 1206 165k 2.8v, <25v 450k 78.7k 450k 78.7k 4.0v to 36v 2.20v 2.2f 68f 1206 140k 2.8v, <25v 500k 69.8k 500k 69.8k 4.3v to 36v 2.50v 2.2f 47f 1206 115k 2.8v, <25v 550k 61.9k 600k 54.9k 5.5v to 36v 3.30v 2.2f 22f 1206 78.7k aux 600k 54.9k 700k 44.2k 7v to 36v 5.00v 2.2f 10f 1206 47.5k aux 700k 44.2k 1m 29.4k 10.5v to 36v 8.00v 2.2f 10f 1206 27.4k aux 800k 39.2k 1.5m 16.2k 3.6v to 15v 0.82v 2.2f 200f 1206 5.62m v in 250k 150k 600k 54.9k 3.6v to 15v 1.00v 2.2f 200f 1206 953k v in 300k 124k 700k 44.2k 3.6v to 15v 1.20v 2.2f 147f 1206 487k v in 350k 105k 800k 39.2k 3.6v to 15v 1.50 v 2.2f 147f 1206 280k v in 400k 88.7k 900k 34.0k 3.6v to 15v 1.80v 2.2f 100f 1206 196k v in 450k 78.7k 1m 29.4k 3.6v to 15v 2.00v 2.2f 68f 1206 165k v in 450k 78.7k 1.1m 26.1k 4.0v to 15v 2.20v 2.2f 68f 1206 140k v in 500k 69.8k 1.25m 22.1k 4.3v to 15v 2.50v 2.2f 47f 1206 115k v in 550k 61.9k 1.3m 21.0k 5.5v to 15v 3.30v 2.2f 22f 1206 78.7k aux 600k 54.9k 1.7m 14.0k 7v to 15v 5.00v 2.2f 10f 1206 47.5k aux 700k 44.2k 2m 10.0k 9v to 24v 0.82v 2.2f 200f 1206 5.62m 2.8v, <25v 250k 150k 400k 88.7k 9v to 24v 1.00v 2.2f 200f 1206 953k 2.8v, <25v 300k 124k 450k 79.0k 9v to 24v 1.20v 2.2f 147f 1206 487k 2.8v, <25v 350k 105k 500k 69.8k 9v to 24v 1.50v 2.2f 147f 1206 280k 2.8v, <25v 400k 88.7k 550k 61.9k 9v to 24v 1.80v 2.2f 100f 1206 196k 2.8v, <25v 450k 78.7k 650k 49.9k 9v to 24v 2.00v 2.2f 68f 1206 165k 2.8v, <25v 450k 78.7k 700k 44.2k 9v to 24v 2.20v 2.2f 47f 1206 140k 2.8v, <25v 500k 69.8k 750k 42.2k 9v to 24v 2.50v 2.2f 22f 1206 115k 2.8v, <25v 550k 61.9k 800k 39.2k 9v to 24v 3.30v 2.2f 22f 1206 78.7 k aux 600k 54.9k 1m 29.4k 9v to 24v 5.00v 2.2f 10f 1206 47.5k aux 700k 44.2k 1.5m 16.2k 10.5v to 24v 8.00v 2.2f 10f 1206 27.4k aux 800k 39.2k 1.5m 16.2k 13v to 24v 10.00v 2.2f 10f 1206 21.5k aux 900k 34.0k 1.3m 21.0k 18v to 36v 0.82v 2.2f 200f 1206 5.62m 2.8v, <25v 250k 150k 250k 150k 18v to 36v 1.00v 2.2f 200f 1206 953k 2.8v, <25v 300k 124k 300k 124k 18v to 36v 1.20v 2.2f 147f 1206 487k 2.8v, <25v 350k 105k 350k 105k 18v to 36v 1.50v 2.2f 147f 1206 280k 2.8v, <25v 400k 88.7k 400k 88.7k 18v to 36v 1.80v 2.2f 100f 1206 196k 2.8v, <25v 450k 78.7k 450k 78.7k 18v to 36v 2.00v 2.2f 68f 1206 165k 2.8v, <25v 450k 78.7k 450k 78.7k 18v to 36v 2.20v 2.2f 47f 1206 140k 2.8v, <25v 500k 69.8k 500k 69.8k 18v to 36v 2.50v 2.2f 22f 1206 115k 2.8v, <25v 550k 61.9k 600k 54.9k 18v to 36v 3.30v 2.2f 22f 1206 78.7k aux 600k 54.9k 700k 44.2k 18v to 36v 5.00v 2.2f 10f 1206 47.5k aux 700k 44.2k 1m 29.4k 18v to 36v 8.00v 2.2f 10f 1206 27.4k aux 800k 39.2k 1.5m 16.2k 18v to 36v 10.00v 2.2f 10f 1206 21.5k aux 900k 34.0k 1.3m 21.0k note: an input bulk capacitor is required. 200f is 2 100f, 147 is 100f||47f 8032fg LTM8032
11 for more information www.linear.com/LTM8032 a pplica t ions i n f or m a t ion circuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. ceramic capacitors are also piezoelectric. in burst mode operation, the LTM8032 s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. since the LTM8032 operates at a lower current limit during burst mode operation, the noise is typically very quiet to a casual ear. if this audible noise is unacceptable, use a high performance electrolytic capacitor at the output. the input capacitor can be a parallel combination of a 2.2f ceramic capacitor and a low cost electrolytic capacitor. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8032. a ceramic input capacitor combined with trace or cable inductance forms a high q ( under damped) tank circuit. if the LTM8032 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi - bly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safely section. electromagnetic compliance the LTM8032 is compliant with the radiated emissions requirements of en55022 class b . graphs of the LTM8032 s emc performance are given in the typical performance characteristics section. further data, operating conditions and test setup are detailed in an emi test report available from the linear technology website. frequency selection the LTM8032 uses a constant frequency pwm architecture that can be programmed to switch from 200 khz to 2.4mhz by using a resistor tied from the rt pin to ground. table 2 provides a list of r t resistor values and their resultant frequencies. operating frequency trade-offs it is recommended that the user apply the optimal r t value given in table 1 for the input and output operating condition. system level or other considerations, however, may necessitate another operating frequency. while the LTM8032 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. a frequency that is too high can reduce efficiency, generate excessive heat or even damage the LTM8032 if the output is overloaded or short-circuited. a frequency that is too low can result in a final design that has too much output ripple or too large of an output cap. the maximum frequency ( and attendant r t value) at which the LTM8032 should be allowed to switch is given in table 1 in the f max column, while the recommended frequency ( and r t value) for optimal efficiency over the given input condition is given in the f optimal column. there are additional conditions that must be satisfied if the synchronization function is used. please refer to the synchronization section for details. bias pin considerations the bias pin is used to provide drive power for the internal power switching stage and operate internal circuitry. for proper operation, it must be powered by at least 2.8 v. if the output voltage is programmed to be 2.8 v or higher, simply tie bias to aux. if v out is less than 2.8 v, bias can be tied to v in or some other voltage source. in all cases, ensure that the maximum voltage at the bias pin is both less than 25 v and the sum of v in and bias is less table 2. switching frequency vs r t value switching frequency (mhz) r t value (k) 0.2 187 0.3 124 0.4 88.7 0.5 69.8 0.6 54.9 0.7 44.2 0.8 39.2 0.9 34 1.0 29.4 1.2 23.7 1.4 19.1 1.5 16.2 1.8 13.3 2 11.5 2.2 9.76 2.4 8.66 8032fg LTM8032
12 for more information www.linear.com/LTM8032 a pplica t ions i n f or m a t ion than 56 v. if bias power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the LTM8032. load sharing tw o or more LTM8032 s may be paralleled to produce higher currents. this may, however, alter the emi performance of the LTM8032s. to do this, tie the v in , adj, v out and share pins of all the paralleled LTM8032s together. to ensure that paralleled modules start up together, the run/ ss pins may be tied together, as well. synchronize the LTM8032s to an external clock to eliminate beat frequen - cies, if required. if the run/ss pins are not tied together, make sure that the same valued soft-start capacitors are used for each module. an example of two LTM8032 modules configured for load sharing is given in the typical applications section. for current sharing applications using multiple LTM8032 s, the adj pins for all regulators may be combined using one resistor to ground as determined by: r adj = 196.71 n v out C 0.79 where n is the number of paralleled modules and r adj is in k. burst mode operation to enhance efficiency at light loads, the LTM8032 auto - matically switches to burst mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. during burst mode operation, the LTM8032 delivers single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. in addition, v in and bias quiescent currents are reduced to typically 25 a and 60 a respectively during the sleep time. as the load current decreases towards a no- load condition, the percentage of time that the LTM8032 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher efficiency. burst mode operation is enabled by tying sync to gnd. figure 1. the LTM8032 needs more voltage to start than run to disable burst mode operation, tie sync to a stable voltage above 0.7 v or synchronize to an external clock. do not leave the sync pin floating. minimum input voltage the LTM8032 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. in addition, the input voltage required to turn on is higher than that required to run, and depends upon whether the run/ss is used. as shown in figure 1, it takes only about 3.6v in for the LTM8032 to run a 3.3v output at light load. if run/ss is tied directly to v in , a 5.5v input voltage is required to start. if v in is allowed to settle in the operating region first then the run/ss pin is enabled, the minimum input voltage to start at light load is lower, about 4.7 v. a similar curve for 5v out operation is also provided in figure 1. load current (ma) 0 3.0 input voltage (v) 3.5 4.0 4.5 5.0 5.5 6.0 500 1000 1500 2000 8032 f01a to run to start run/ss enabled v out = 3.3v load current (ma) 0 input voltage (v) 6.5 7.0 7.5 8032 f01b 6.0 5.5 5.0 500 1000 1500 2000 to run to start run/ss enabled v out = 5v 8032fg LTM8032
13 for more information www.linear.com/LTM8032 soft-start the run/ss pin can be used to soft-start the LTM8032, reducing the maximum input current during start-up. the run/ss pin is driven through an external rc network to create a voltage ramp at this pin. figure 2 shows the start- up and shutdown waveforms with the soft-start circuit. by choosing an appropriate rc time constant, the peak start- up current can be reduced to the current that is required to regulate the output, with no overshoot. choose the value of the resistor so that it can supply at least 20 a when the run/ss pin reaches 2.5v. a pplica t ions i n f or m a t ion figure 2. to soft-start the LTM8032, add a resistor and capacitor to the run/ss pin shorted input protection care needs to be taken in systems where the output will be held high when the input to the LTM8032 is absent. this may occur in battery charging applications or in battery back-up systems where a battery or some other supply is diode ored with the LTM8032s output. if the v in pin is allowed to float and the run/ss pin is held high (either by a logic signal or because it is tied to v in ), then the LTM8032s internal circuitry will pull its quiescent current through its internal power switch. this is fine if your system can tolerate a few milliamps in this state. if you ground the run/ss pin, the internal switch current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the LTM8032 can pull large currents from the output through the v in pin, potentially damaging the device. figure 3 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. figure 3. the input diode prevents a shorted input from discharging a back-up battery tied to the output. it also protects the circuit from a reversed input. the LTM8032 runs only when the input is present v out v in run/ss bias r t adj LTM8032 8032 f03 v out gnd v in aux sync synchronization the internal oscillator of the LTM8032 can be synchro- nized by applying an external 250 khz to 2 mhz clock to the sync pin. do not leave this pin floating. the resistor tied from the rt pin to ground should be chosen such that the LTM8032 oscillates 20% lower than the intended synchronization frequency ( see the frequency selection section). the LTM8032 will not enter burst mode operation while synchronized to an external clock, but will instead skip pulses to maintain regulation. 8023 f02 i l 1a/div v run/ss 2v/div v out 2v/div run/ss gnd 0.22f run 15k 2ms/div 8032fg LTM8032
14 for more information www.linear.com/LTM8032 a pplica t ions i n f or m a t ion pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the LTM8032. the LTM8032 is neverthe - less a switching power supply and care must be taken to minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 4 for a suggested layout. ensure that the grounding and heat sinking are acceptable. a few rules to keep in mind are: 1. place the r adj and r t resistors as close as possible to their respective pins. 2. place the c in capacitor as close as possible to the v in and gnd connection of the LTM8032. if a capacitor is connected to the fin terminals, place it as close gnd c out c in 8032 f04 v in fin run/ss sync pgood r adj r t aux bias v out gnd optional fin capacitor figure 4. layout showing suggested external components, gnd plane and thermal vias (lga package) as possible to the fin terminals, such that its ground connection is as close as possible to that of the c in capacitor. 3. place the c out capacitor as close as possible to the v out and gnd connection of the LTM8032. 4. place the c in and c out capacitors such that their ground currents flow directly adjacent or underneath the LTM8032. 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the LTM8032. 6. use vias to connect the gnd copper area to the boards internal ground plane. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. 8032fg LTM8032
15 for more information www.linear.com/LTM8032 hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8032. however, these capacitors can cause problems if the LTM8032 is plugged into a live or fast rising or falling supply ( see linear technology application note 88 for a complete discussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an under-damped tank circuit, and the voltage at the v in pin of the LTM8032 can ring to twice the nominal input voltage, possibly exceeding the LTM8032s rating and damaging the part. a similar phenomenon can occur inside the LTM8032 module, at the output of the integrated emi filter, with the same potential of damaging the part. if the input supply is poorly controlled or the user will be plugging the LTM8032 into an energized supply, the input network should be designed to prevent this overshoot. fig - ure 5 shows the waveforms that result when an LTM8032 circuit is connected to a 24 v supply through six feet of 24-gauge twisted pair. the first plot (5 a) is the response a pplica t ions i n f or m a t ion with a 2.2 f ceramic capacitor at the input. the input voltage rings as high as 35 v and the input current peaks at 20 a. one method of damping the tank circuit is to add another capacitor with a series resistor to the circuit. an alternative solution is shown in figure 5b. a 0.7 resistor is added in series with the input to eliminate the voltage overshoot ( it also reduces the peak input current). a 0.1f capacitor improves high frequency filtering. for high input voltages its impact on efficiency is minor, reducing ef - ficiency less than one-half percent for a 5 v output at full load operating from 24 v. by far the most popular method of controlling overshoot is shown in figure 5 c, where an aluminum electrolytic capacitor has been connected to fin. this capacitors high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. figure 5c shows the c apacitor added to the v in terminals, but placing the electrolytic capacitor at the fin terminals can improve the LTM8032s emi filtering as well as guard against overshoots caused by the q of the integrated filter. 8032fg LTM8032
16 for more information www.linear.com/LTM8032 a pplica t ions i n f or m a t ion figure 5. a well chosen input network prevents input voltage overshoot and ensures reliable operation when the LTM8032 is hot-plugged to a live supply + LTM8032 4.7f v in 20v/div i in 10a/div 20s/div v in closing switch simulates hot plug i in (5a) (5b) low impedance energized 24v supply stray inductance due to 6 feet (2 meters) of twisted pair + LTM8032 4.7f 0.1f 0.7 v in 20v/div i in 10a/div 20s/div danger ringing v in may exceed absolute maximum rating (5c) + 4.7f 22f 35v ai.ei. 8032 f05 v in 20v/div i in 10a/div 20s/div + v in LTM8032 v in fin 8032fg LTM8032
17 for more information www.linear.com/LTM8032 thermal considerations the LTM8032 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the temperature rise curves given in the typical performance character - istics section can be used as a guide. these curves were generated by an LTM8032 mounted to a 36cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system s line, load and environmental operating conditions. the thermal resistance numbers listed in the pin con - figuration are based on modeling the module package mounted on a test board specified per jesd 51-9 test boards for area array surface mount package thermal measurements. the thermal coefficients provided in this page are based on jesd 51-12 guidelines for reporting and using electronic package thermal information. for increased accuracy and fidelity to the actual application, many designers use fea to predict thermal performance . to that end, the pin configuration typically gives four thermal coefficients: ? ja C thermal resistance from junction to ambient. ? jcbottom C thermal resistance from junction to the bottom of the product case. ? jctop C thermal resistance from junction to top of the product case. ? jb C thermal resistance from junction to the printed circuit board. while the meaning of each of these coefficients may seem to be intuitive, jedec has defined each to avoid confu - sion and inconsistency. these definitions are given in jesd 51-12, and are quoted or paraphrased in the following: ? ja is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. ? jcbottom is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. in the typical module regulator, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient environment. as a result, this thermal resistance value may be useful for comparing packages but the test conditions dont generally match the users application. ? jctop is determined with nearly all of the component power dissipation flowing through the top of the pack- age. as the electrical connections of the typical module regulator are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. ? jb is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the module regulator and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. the board temperature is mea - sured a specified distance from the package, using a two sided, two layer board. this board is described in jesd 51-9. a pplica t ions i n f or m a t ion 8032fg LTM8032
18 for more information www.linear.com/LTM8032 the most appropriate way to use the coefficients is when running a detailed thermal analysis, such as fea, which considers all of the thermal resistances simultaneously. none of them can be individually used to accurately pre - dict the thermal performance of the product, so it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature versus load graphs given in the LTM8032 data sheet. a graphical representation of these thermal resistances is given in figure 6. the blue resistances are contained within the module regulator, and the green are outside. the die temperature of the LTM8032 must be lower than the maximum rating of 125 c, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8032. the bulk of the heat flow out of the LTM8032 is through the bottom of the module and the pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, resulting in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. finally, be aware that at high ambient temperatures the internal schottky diode will have significant leakage current increasing the quiescent current of the LTM8032. a pplica t ions i n f or m a t ion 8032 f06 module regulator junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction a t case (bottom)-to-board resistance figure 6 8032fg LTM8032
19 for more information www.linear.com/LTM8032 typical a pplica t ions 0.82v step-down converter 1.8v step-down converter rt share 5.62m *running voltage range. see applications for start-up details 150k v in fin 2.2f 200f v out 0.82v 2a run/ss v in * 3.6vdc to 24vdc pgood bias LTM8032 aux v out sync gnd 8032 ta02 adj rt share 196k *running voltage range. see applications for start-up details 78.7k v in fin 2.2f 100f v out 1.8v 2a run/ss v in * 3.6vdc to 24vdc pgood bias LTM8032 aux v out sync gnd 8032 ta03 adj 8032fg LTM8032
20 for more information www.linear.com/LTM8032 typical applica t ions 2.5v step-down converter 5v step-down converter 3.3v step-down converter rt share 115k *running voltage range. see applications for start-up details 61.9k v in fin 2.2f 47f v out 2.5v 2a run/ss v in * 4.3vdc to 36vdc 3.3v pgood bias LTM8032 aux v out sync gnd 8032 ta04 adj rt share v in fin 2.2f 22f 78.7k 54.9k v out 3.3v 2a run/ss v in * 5.5vdc to 36vdc pgood bias LTM8032 aux v out sync gnd 8032 ta08 adj *running voltage range. see applications for start-up details rt share v in fin 2.2f 10f 47.5k 44.2k v out 5v 2a run/ss v in * 7vdc to 36vdc pgood bias LTM8032 aux v out sync gnd 8032 ta05 adj *running voltage range. see applications for start-up details 8032fg LTM8032
21 for more information www.linear.com/LTM8032 typical applica t ions 8v step-down converter tw o LTM8032s operating in parallel rt share v in fin 2.2f 10f 27.4k 39.2k v out 8v 2a run/ss v in * 10.5vdc to 36vdc pgood bias LTM8032 aux v out sync gnd 8032 ta06 adj *running voltage range. see applications for start-up details rt share v in fin 2.2f 40k 54.9k 8032 ta07 47f v out 3.3v 3.5a run/ss v in * 5.5vdc to 36vdc optional sync tie to gnd if not used pgood bias LTM8032 aux v out sync gnd adj rt share 54.9k v in fin 2.2f run/ss pgood bias LTM8032 aux v out sync gnd adj *running voltage range. see applications for start-up details 8032fg LTM8032
22 for more information www.linear.com/LTM8032 p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. 9.00 bsc package top view lga 71 1212 rev a 15.00 bsc 4 pad 1 corner 3 pads see notes x y aaa z aaa z 2.670 ? 2.970 detail a package side view detail a substrate mold cap 0.27 ? 0.37 2.40 ? 2.60 bbb z z 1.270 bsc 0.635 0.025 sq. 71x 12.700 bsc 7.620 bsc pad 1 ? (0.635) package in tray loading orientation 2.540 2.540 1.270 5.080 5.080 6.350 6.350 3.810 3.810 0.000 1.270 3.810 3.810 2.540 2.540 1.270 1.270 0.000 suggested pcb layout top view ltmxxxxxx module tray pin 1 bevel component pin 1 package bottom view 67 5 1234 l k j h g f e d c b a notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222, spp-010 and spp-020 5. primary datum -z- is seating plane 6. the total number of pads: 71 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature detail a s yxeee detail a symbol aaa bbb eee tolerance 0.15 0.10 0.05 1.27 bsc lga package 71-lead (15mm 9mm 2.82mm) (reference ltc dwg # 05-08-1823 rev a) 7 package row and column labeling may vary among module products. review each package layout carefully ! 7 see notes 8032fg LTM8032
23 for more information www.linear.com/LTM8032 p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. package top view 4 pin ?a1? corner y x aaa z aaa z detail a package bottom view 3 see notes l k j h g f e d c b a 1234567 pin 1 bga 71 1212 rev a tray pin 1 bevel package in tray loading orientation component pin ?a1? notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature detail a ?b (71 places) detail b substrate a a1 b1 ccc z detail b package side view mold cap z m x yzddd m zeee symbol a a1 a2 b b1 d e e f g h1 h2 aaa bbb ccc ddd eee min 3.22 0.50 2.72 0.71 0.60 0.27 2.45 nom 3.42 0.60 2.82 0.78 0.63 15.0 9.0 1.27 12.7 7.62 0.32 2.50 max 3.62 0.70 2.92 0.85 0.66 0.37 2.55 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 71 a2 d e e e b f g suggested pcb layout top view 0.000 1.270 6.350 2.540 3.810 5.080 6.350 1.270 2.540 3.810 5.080 3.810 2.540 1.270 3.810 2.540 1.270 0.3175 0.3175 0.000 4.765 5.395 ltmxxxxxx module // bbb z z h2 h1 b 5. primary datum -z- is seating plane 6. solder ball composition can be 96.5% sn/3.0% ag/0.5% cu or sn pb eutectic 0.630 0.025 ? 71x bga package 71-lead (15mm 9.00mm 3.42mm) (reference ltc dwg # 05-08-1885 rev a) 7 package row and column labeling may vary among module products. review each package layout carefully ! 7 see notes 8032fg LTM8032
24 for more information www.linear.com/LTM8032 p ackage descrip t ion pin signal description a1 v out a2 v out a3 v out a4 v out a5 gnd a6 gnd a7 gnd b1 v out b2 v out b3 v out b4 v out b5 gnd b6 gnd b7 gnd c1 v out c2 v out c3 v out c4 v out c5 gnd c6 gnd c7 gnd d1 v out d2 v out d3 v out d4 v out d5 gnd d6 gnd d7 gnd e1 gnd e2 gnd e3 gnd e4 gnd e5 gnd e6 gnd pin signal description e7 gnd f1 gnd f2 gnd f3 gnd f4 gnd f5 gnd f6 gnd f7 gnd g1 gnd g2 gnd g3 gnd g4 gnd g5 gnd g6 gnd g7 rt h1 gnd h2 gnd h3 gnd h4 bias h5 aux h6 gnd h7 share j5 gnd j6 gnd j7 adj k1 v in k2 v in k3 fin k5 gnd k6 gnd k7 pgood l1 v in l2 v in l3 fin l5 run/ss l6 sync l7 gnd table 3. LTM8032 pinout (sorted by pin number) 8032fg LTM8032
25 for more information www.linear.com/LTM8032 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number d 8/11 added bga package. changes reflected throughout the data sheet. 1 to 26 e 9/11 updated bga pin configuration diagram. 2 f 2/12 indicate figure 4 is layout example for lga package consolidate bga and lga pinout table 14 24 g 1/14 added snpb terminal finish product option 1, 2 (revision history begins at rev d) 8032fg LTM8032
26 for more information www.linear.com/LTM8032 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LTM8032 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 ? linear technology corporation 2009 lt 0114 rev g ? printed in usa r ela t e d p ar t s p ackage p ho t ographs part number description comments ltm8033 en55022b certified 36v, 3a step-down module regulator 0.8v v out 24v, synchronizable, 11.25mm 15mm 4.3mm lga ltm4606 en55022b certified 28v, 6a step-down module regulator 0.6v v out 5v, synchronizable, 15mm 15mm 2.8mm lga ltm4612 en55022b certified 36v, 5a step-down module regulator 3.3v v out 15v, synchronizable, 15mm 15mm 2.8mm lga ltm4613 en55022b certified 36v, 8a step-down module regulator 3.3v v out 15v, synchronizable, 15mm 15mm 4.3mm lga ltm8023 36v, 2a step-down module regulator 0.8v v out 10v, synchronizable, 9mm 11.25mm 2.8mm lga lga bga 8032fg LTM8032

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